1/4 rev. a structure silicon monolithic ic products high side switch ic type BD2066FJ features low on resistance 80m ? mosfet switch 1a continuous current load active ?high? control logic soft start circuit over current detection thermal shutdown under voltage lockout open drain error flag output reverse-current protection when power switch off esd protection absolute maximum ratings parameter symbol rating unit supply voltage v in -0.3 ~ 6.0 v en voltage v en -0.3 ~ 6.0 v /oc voltage v /oc -0.3 ~ 6.0 v /oc sink current is /oc ~ 5 ma out voltage v out -0.3 ~ 6.0 v storage temperature t stg -55 ~ 150 c power dissipation pd 675 *1 mw *1 mounted on 70mm*70mm*1.6mm glass-epoxy pcb. derating : 5.4mw/c above ta=25c. *2 this product is not designed for protection against radioactive rays. operating conditions parameter symbol min. typ. max. unit operating voltage v in 2.7 - 5.5 v operating temperature t opr -40 - 85 c continuous output current i out 0.0 - 1.0 a
2/4 rev. a electric characteristics unless otherwise specified v in = 5.0v, ta = 25c parameter symbol min. ty p. max. unit condition current consumption operating current i dd - 130 180 a v en = 5v, out = open standby current i stb - 0.01 1 a v en = 0v, out = open i/o en input voltage v en 2.0 - - v high input v en - - 0.8 v low input en input current i en -1.0 0.01 1.0 a v en = 0v or 5v /oc output low voltage v /oc - - 0.5 v i /oc = 0.5ma /oc output leak current il /ocl - 0.01 1 a v /oc = 5v /oc delay time t /oc 10 15 20 ms power switch on resistance r on - 80 125 m i out = 500ma current limit threshold i th 1.5 2.4 3.0 a short-circuit current i sc 1.1 1.5 2.1 a v out = 0v, c l = 47 f rms output rise time t on1 - 0.8 10 ms r l = 10 ? output rise delay time t on2 - 1.1 20 ms r l = 10 ? output fall time t off1 - 5 20 s r l = 10 ? output fall delay time t off2 - 10 40 s r l = 10 ? switch leak current il sw - - 1.0 a v en = 0v, v out = 0v reverse leak current il rev - - 1.0 a v out = 5.5v, v in = 0v uvlo uvlo threshold v tuvh 2.1 2.3 2.5 v increasing v in v tuvl 2.0 2.2 2.4 v decreasing v in measurement circuit timing chart at output rise / fall time t on2 t on1 10% 90% 50% 50% 90% 10% t off2 t off1 v out v en in gnd en out /oc v in v en a i out r l c l a
3/4 rev. a block diagram package pin description pin no. pin name function 1 gnd ground. 2 in power supply input. input terminal to the power switch and power supply input terminal of the internal circuit. 3 en1 enable input 1. power switch 1 on at high level. 4 en2 enable input 2 power switch 2 on at high level. 5 /oc2 over current output 2. low at over current, ov er-temperature detection. open drain output. 6 out2 power switch output 2. 7 out1 power switch output 1. 8 /oc1 over current output 1. low at over current, ov er-temperature detection. open drain output. in en2 out1 charge pump1 tsd1 uvl o ocd1 charge pump2 tsd2 ocd2 out2 en1 gnd /oc2 /oc1 gate logic1 gate logic2 sw1 sw2 d2066 lot no. sop-j8 ( unit : mm )
4/4 rev. a cautions on use (1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossibl e to identify breaking mode such as a short circuit or an open circuit. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) power supply and gnd line design pcb pattern to provide low impedance for the wiring between the power supply and the gnd lines. pay attention to the interference by common impeda nce of layout pattern when there are plural power supplies and gnd lines. especially, when there are gnd pattern for small signal and gnd pattern for large current incl uded the external circuits, separate each gnd pattern. furthermore, for all power supply terminals to ics, mount a capacitor between the power supply and the gnd terminal. at the same time, in order to use a capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occu rrence of capacity dropout at a low temperature, thus determining the constant. (3) gnd voltage make setting of the potential of the gnd te rminal so that it will be maintained at the minimum in any operating state. furthermore, check to be sure no terminals are at a potenti al lower than the gnd voltage including an actual electric transient. (4) short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occu rs due to foreign matters entering between terminals or between the terminal and the power supply or the gnd terminal, the ics can break down. (5) operation in strong electromagnetic field be noted that using ics in the strong elec tromagnetic field can malfunction them. (6) input terminals in terms of the construction of ic, parasitic elements are i nevitably formed in relation to potential. the oper ation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. therefore, pay thorough attention not to handle the input terminal s, such as to apply to the input terminals a voltage lower than the gnd respectively , so that any parasitic element will oper ate. furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the ic. in addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than t he power supply voltage or within the guaranteed value of electrical characteristics. (7) external capacitor in order to use a ceramic capacitor as the external capacitor, determine the constant wi th consideration given to a degradation in the nominal capacitance due to dc bias and c hanges in the capacitance due to temperature, etc. (8) thermal shutdown circuit (tsd) when junction temperatures become 170c (typ) or higher, the thermal shutdown circuit operates and turns a switch off. the thermal shutdown circuit, which is aimed at isolating the lsi from thermal runaway as much as possible, is not aimed at the protection or guar antee of the lsi. therefore, do not continuously use the lsi wi th this circuit operating or use the lsi assuming its operation. (9) thermal design perform thermal design in which there ar e adequate margins by taking into account the power dissipation (pd) in actual states of use.
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